memory core
英 [ˈmeməri kɔː(r)]
美 [ˈmeməri kɔːr]
网络 存储磁心; 存储器核; 存储磁芯
双语例句
- However, PHP itself is written in C, and memory problems deep in PHP's core surface occasionally.
然而，PHP本身也是使用C语言编写的，有时记忆问题深至PHP的核面。 - Those services are DynaCache, memory to memory session replication, core groups, Web services caching, and stateful session bean persistence.
这些服务是DynaCache、内存到内存会话复制、核心组、Web服务缓存和有状态会话Bean持久性。 - The FPGA then filters out any data not relevant to the query, streaming the remaining data back to memory for concurrent processing by the CPU core.
FPGA然后过滤掉与查询无关的数据，将剩余的数据放回内存，供CPU内核进行并发处理。 - The CPU usage, amount of virtual memory consumed, file sizes, and core file sizes can be restricted with the ulimit command.
CPU使用、消耗的虚拟内存量、文件大小和内核文件大小可以使用ulimit命令限制。 - I argued that drum memory was superior to core memory, that decimal coding was intrinsically superior to binary.
我争辩说，磁鼓记忆装置比核心内存更好，十进制编码天生就比二进制好。 - Memory core is one key component in system-on-chip ( SOC) designs. Also, memory cores usually represent a significant portion of the chip area.
在单一系统晶片（SOC）的设计中，记忆体占有很重要的角色。 - The Art of Memory was at the core of orthodox mystical methods.
记忆的艺术在神秘主义的正统方法的核心。 - The single most important parameter in the design of a ferrite memory is the core switching time.
在铁氧体存贮器设计中，一个重要的参数是磁芯翻转时间。 - Microcontroller Integrated Circuit with Read Only Memory Microcontroller integrated circuit comprises a processor core which exchanges data with at least one data processing and storage device.
单片机集成电路包含一个处理器内核，它至少通过一种数据处理或存储设备来交换数据。 - Any bi-conditional device, such as a memory core, is able to store a single bit.
任何的双重条件的装置，例如磁心贮记，都可以存贮一数元。 - Memory core is one key component in system-on-chip ( SOC) designs.
嵌入式记忆体是现今系统晶片中最常被使用到核心。 - Nondestructive toroidal memory core
非破坏读出环形存储磁心 - The city memory blurs gradually, civic culture core& The city spirit is also chaotic day after day.
关于一座城市的记忆逐渐模糊，城市文化的核心&城市精神也日渐混乱。 - The method of self diagnosis and self repair for composite structure using shape memory alloy and adhesive liquid core optical fibers was studied.
研究了利用形状记忆合金和液芯光纤对复合材料结构中的损伤进行自诊断、自修复的方法。 - These three aspects can be summed up into the design of the memory management unit, a core block of the bus controllers blocking design. Bus controllers applying this design will be able to process multiple messages automatically.
在总线控制器的模块化设计方案中，这三个方面构成了总线控制器的核心模块枣存储管理单元，应用该方案可实现具有多消息自动处理功能的总线控制器。 - And the study on the processing mechanism of autobiographical memory is just the core field of cognitive psychology in autobiographical memory study.
自传记忆加工机制的研究是认知心理学对自传记忆研究的核心领域。 - The theory mainly depends on the cognitive structure in which the limited working memory is the core.
认知负荷理论主要依赖于以容量有限的工作记忆为核心的认知结构的支持。 - Design of ATM Cell Memory Based on IP Core and It's FPGA Implementation in Upstream-framing of ONT TC Layer
ONT传输会聚（TC）层上行组帧中基于IP核的ATM信元存储方案及其FPGA实现 - It utilizes the same memory cell with SRAM core cells and to get the corresponding supply voltage through data flipping features.
它采用与SRAM存储单元相同的模拟单元，通过模拟其数据翻转特性得到对应的电源电压。 - Considering the needs of system integration, the flash memory controller is packaged as IP Core, which accords with the processor local bus interface standard.
考虑到系统集成的需要，将实现的闪存控制器封装成符合处理器本地总线（ProcessorLocalBus，PLB）接口标准的IP核，并根据IP核实现底层驱动程序。 - CPLD sequential logic-control module offers digital sequential logic-control for normal read and write of the system for expanding memory and DSP core processor.
CPLD时序逻辑控制模块为外扩的存储器与DSP核心处理器之间提供系统正常读写的数字时序逻辑控制。 - For the requirements and characteristics, the paper designed the main memory system frame including core layer and security layer.
本文基于内存数据库系统需求以及特点，设计了基于安全服务的内存数据库系统，包括内核层设计、安全层设计。 - [ Background] Emotion, learning and memory are the core components of cognitive functions.
[背景]情感和学习记忆是认知功能的核心，学习和记忆是所有认知功能的基础。 - Based on this, a new architecture of external memory controller with EDAC was presented. And memory controller IP core with EDAC was implemented with verilog hardware description language, the simulation and logical synthesis of which were done either.
最后提出了具有检错纠错功能的外部存储器控制器IP核的体系结构，并基于verilog硬件描述语言实现了该检错纠错存储器控制器IP核，对其进行了功能仿真和逻辑综合以及综合后仿真。 - Vocabulary acquisition in language learning needs good memory. That is one of the reasons why language learning and memory has long been the core concern in the field of psycholinguistics.
语言学习中的词汇习得需要良好的记忆能力，因此语言学习与记忆一直以来就是心理语言学的核心研究问题。 - The memory unit is the core of the memory, whose structure is relatively fixed, and whose performance is determined by the current process.
存储单元是存储器的核心部分，结构相对固定，其性能往往由现有的工艺水平决定。 - We extend the low communication cost software pipeline scheduling to formulate the memory constraints of each processor core and present the schedule as a as single integer quadratic programming problem ROMC ( Rate-Optimal with Memory Constraints).
方法基于低通信软件流水调度模型，对每个处理器核的存储资源进行扩展建模，将内存受限软件流水的调度表示为一个统一的整数二次规划问题ROMC（Rate-OptimalwithMemoryConstraints）。 - Long term memory is the core problem of the study of learning and memory.
长期记忆则是学习记忆研究中的核心问题。